[llvm] r308817 - [X86] Add register form of NOPL and NOPW for assembler/disassembler.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Fri Jul 21 18:30:51 2017
New Revision: 308817

URL: http://llvm.org/viewvc/llvm-project?rev=308817&view=rev
Log:
[X86] Add register form of NOPL and NOPW for assembler/disassembler.

Fixes PR32805.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td
    llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
    llvm/trunk/test/MC/X86/x86-32-coverage.s

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=308817&r1=308816&r2=308817&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Jul 21 18:30:51 2017
@@ -1108,6 +1108,11 @@ let hasSideEffects = 0, SchedRW = [Write
                 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16;
   def NOOPL : I<0x1f, MRMXm, (outs), (ins i32mem:$zero),
                 "nop{l}\t$zero", [], IIC_NOP>, TB, OpSize32;
+  // Also allow register so we can assemble/disassemble
+  def NOOPWr : I<0x1f, MRMXr, (outs), (ins GR16:$zero),
+                 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16;
+  def NOOPLr : I<0x1f, MRMXr, (outs), (ins GR32:$zero),
+                 "nop{l}\t$zero", [], IIC_NOP>, TB, OpSize32;
 }
 
 

Modified: llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-32.txt?rev=308817&r1=308816&r2=308817&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-32.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-32.txt Fri Jul 21 18:30:51 2017
@@ -791,3 +791,9 @@
 
 # CHECK: lwpval $2309737967, (%esp), %edx
 0x8f 0xea 0x68 0x12 0x0c 0x24 0xef 0xcd 0xab 0x89
+
+# CHECK: nopl %eax
+0x0f 0x1f 0xc0
+
+# CHECK: nopw %ax
+0x66 0x0f 0x1f 0xc0

Modified: llvm/trunk/test/MC/X86/x86-32-coverage.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=308817&r1=308816&r2=308817&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32-coverage.s (original)
+++ llvm/trunk/test/MC/X86/x86-32-coverage.s Fri Jul 21 18:30:51 2017
@@ -2067,6 +2067,14 @@
 // CHECK:  encoding: [0x0f,0x1f,0x05,0x78,0x56,0x34,0x12]
         	nopl	0x12345678
 
+// CHECK: nopw	%ax
+// CHECK:  encoding: [0x66,0x0f,0x1f,0xc0]
+        	nopw	%ax
+
+// CHECK: nopl	%eax
+// CHECK:  encoding: [0x0f,0x1f,0xc0]
+        	nopl	%eax
+
 // CHECK: nop
 // CHECK:  encoding: [0x90]
         	nop