[PATCH] D33518: [AArch64] Fix stores of zero values

[Nirav Dave via Phabricator via llvm-commits]

niravd added a comment.

In https://reviews.llvm.org/D33518#813376, @gberry wrote:

> I noticed a few code size regressions looking through the diffs of generated code for this change which were caused by:
>
> - the offsets of the stores not having the right alignment to allow for stp x opcodes to be formed
> - the offsets of the stores being too large for stp x, but not too large for stp q
> - the offsets of the stores being so large that adds are needed to compute the address for str x, but not so large that adds are needed to compute the address for str q


Hmm. Dealing with offsets makes this harder. It seems like we could achieve the same rough goal in a more straight forward-manner post-DAG after load-store pairing has happened.


https://reviews.llvm.org/D33518