[llvm] r308294 - [AMDGPU][MC] Optimized IsRegIntersect function

Dmitry Preobrazhensky via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 18 04:14:02 PDT 2017


Author: dpreobra
Date: Tue Jul 18 04:14:02 2017
New Revision: 308294

URL: http://llvm.org/viewvc/llvm-project?rev=308294&view=rev
Log:
[AMDGPU][MC] Optimized IsRegIntersect function

Optimized IsRegIntersect by using MCRegAliasIterator

See Bug 33800: https://bugs.llvm.org//show_bug.cgi?id=33800

Reviewers: arsenm, artem.tamazov

Differential Revision: https://reviews.llvm.org/D35452

Modified:
    llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp?rev=308294&r1=308293&r2=308294&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp Tue Jul 18 04:14:02 2017
@@ -539,23 +539,9 @@ bool isSGPR(unsigned Reg, const MCRegist
 }
 
 bool isRegIntersect(unsigned Reg0, unsigned Reg1, const MCRegisterInfo* TRI) {
-
-  if (Reg0 == Reg1) {
-    return true;
-  }
-
-  unsigned SubReg0 = TRI->getSubReg(Reg0, 1);
-  if (SubReg0 == 0) {
-    return TRI->getSubRegIndex(Reg1, Reg0) > 0;
+  for (MCRegAliasIterator R(Reg0, TRI, true); R.isValid(); ++R) {
+    if (*R == Reg1) return true;
   }
-
-  for (unsigned Idx = 2; SubReg0 > 0; ++Idx) {
-    if (isRegIntersect(Reg1, SubReg0, TRI)) {
-      return true;
-    }
-    SubReg0 = TRI->getSubReg(Reg0, Idx);
-  }
-
   return false;
 }
 




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