[PATCH] D35544: [COFF, ARM64] Force ADRP relocations

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

https://reviews.llvm.org/D35544

Files:
  lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
  test/MC/AArch64/adrp-relocation-coff.s


Index: test/MC/AArch64/adrp-relocation-coff.s
===================================================================
--- /dev/null
+++ test/MC/AArch64/adrp-relocation-coff.s
@@ -0,0 +1,11 @@
+// RUN: llvm-mc -triple=aarch64-windows -filetype=obj -o - %s| llvm-readobj -r - | FileCheck %s
+        .text
+// This tests that LLVM doesn't think it can deal with the relocation on the ADRP
+// itself (even though it knows everything about the relative offsets of sym and
+// the adrp instruction) because its value depends on where this object file's
+// .text section gets relocated in memory.
+        adrp x0, sym
+
+        .global sym
+sym:
+// CHECK: IMAGE_REL_ARM64_PAGEBASE_REL21 sym
Index: lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
===================================================================
--- lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -580,6 +580,13 @@
   MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
     return createAArch64WinCOFFObjectWriter(OS);
   }
+  bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
+                             const MCValue &Target) override {
+    // The same reason as in ELFAArch64AsmBackend above
+    if ((uint32_t)Fixup.getKind() == AArch64::fixup_aarch64_pcrel_adrp_imm21)
+      return true;
+    return false;
+  }
 };
 }
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D35544.107053.patch
Type: text/x-patch
Size: 1414 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170718/d658e0fe/attachment.bin>