[PATCH] D35307: [AArch64] Initial SVE register definitions

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 13 01:47:41 PDT 2017


sdesmalen added inline comments.


================
Comment at: lib/Target/AArch64/AArch64RegisterInfo.td:134
+
+// Purely virtual Vector Granule (VG) Dwarf register
+def VG : AArch64Reg<0, "vg">, DwarfRegNum<[46]>;
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rengolin wrote:
> What's this? The "register" that stores the current length of the vectors?
The VG Dwarf register indeed contains the length of an SVE vector, defined as the number of 64bit 'granules' in a vector (e.g. 2 for a 16byte vector). It is described in more detail here:
https://developer.arm.com/docs/100985/0000


Repository:
  rL LLVM

https://reviews.llvm.org/D35307





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