[PATCH] D35010: [IRCE] Recognize loops with ne/eq latch conditions
Max Kazantsev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 9 23:40:45 PDT 2017
mkazantsev added inline comments.
================
Comment at: lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp:810
+ if (Pred == ICmpInst::ICMP_NE && LatchBrExitIdx == 1)
+ // while (++i != len) { while (++i < len) {
+ // ... ---> ...
----------------
mkazantsev wrote:
> sanjoy wrote:
> > I don't think this equivalence holds if the RHS is negative.
> What's the problem with negative RHS? There is no conceptual difference between
> while (++i != 5) ---> while (++i < 5)
> and
> while (++i != -5) ---> while (++i < -5)
> Maybe what you meant was "if the RHS is less than the IV's initial value"? Such loops get rejected earlier, test_02 exercises this situation. Will add an assert on that.
Actually not earlier, but under this condition we will bail out on line 842.
https://reviews.llvm.org/D35010
More information about the llvm-commits
mailing list