[PATCH] D35010: [IRCE] Recognize loops with ne/eq latch conditions
Sanjoy Das via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 9 06:15:07 PDT 2017
sanjoy requested changes to this revision.
sanjoy added a comment.
This revision now requires changes to proceed.
Did you consider a somewhat more general trick of using the loop's BE taken count to derive an equivalent BE condition? E.g. if the loops be taken count is 100, and the post-incremented indvar (the one the BE condition uses) is `{5,+,1}` (everything is `i32`) then the BE taken condition can be `++I s< 105` (and you can derive this without looking at whether the BE condition was expressed using SLT or NE or EQ etc.).
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Comment at: lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp:810
+ if (Pred == ICmpInst::ICMP_NE && LatchBrExitIdx == 1)
+ // while (++i != len) { while (++i < len) {
+ // ... ---> ...
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I don't think this equivalence holds if the RHS is negative.
https://reviews.llvm.org/D35010
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