[PATCH] D34677: [AMDGPU] Whole Quad Mode variant of mov.dpp intrinsic
David Stuttard via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 30 08:39:36 PDT 2017
dstuttard added inline comments.
================
Comment at: lib/Target/AMDGPU/VOP1Instructions.td:645-648
+def V_MOV_B32_dpp_wqm : VOP1_DPP<0x1, !cast<VOP1_Pseudo>("V_MOV_B32_e32")> {
+ let WQM = 1;
+ let isCodeGenOnly = 1;
+}
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arsenm wrote:
> It would be better to structure this similarly to how the other WQM mode instructions are already handled. This is adding another encoded instruction which we don't want.
Sure - which WQM mode instruction were you thinking would be a better model?
https://reviews.llvm.org/D34677
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