[PATCH] D34677: [AMDGPU] Whole Quad Mode variant of mov.dpp intrinsic

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 28 10:05:29 PDT 2017


arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/VOP1Instructions.td:645-648
+def V_MOV_B32_dpp_wqm : VOP1_DPP<0x1, !cast<VOP1_Pseudo>("V_MOV_B32_e32")> {
+  let WQM = 1;
+  let isCodeGenOnly = 1;
+}
----------------
It would be better to structure this similarly to how the other WQM mode instructions are already handled.  This is adding another encoded instruction which we don't want.


https://reviews.llvm.org/D34677





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