[PATCH] D34815: [Power9] Spill gprs to vector registers rather than stack

[Zaara Syeda via Phabricator via llvm-commits]

syzaara added inline comments.


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Comment at: test/CodeGen/PowerPC/gpr-vsr-spill.ll:19
+; CHECK: mr 31, 3
+; CHECK: mtvsrd 0, 4
+; CHECK: mffprd 30, 0
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inouehrs wrote:
> Actually, I cannot catch why we need spill here.
> The inline-asm clobbers all gprs but r30 and r31. So why we don't just use r30 and r31 for %a and %b?
Yes, but we need a register to save the result of the add. The result register used for the add is r30 and so one of the input parameters is spilled.


https://reviews.llvm.org/D34815