[PATCH] D34545: [AMDGPU] Simplify setcc (sext from i1 b), -1|0, cc

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 22 17:57:52 PDT 2017


arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:4315
+// a register or memory and does not require v_cmdmask_b32 to be deserialized.
+static bool isDeserializedBool(SDValue V) {
+  if (V.getValueType() != MVT::i1)
----------------
Deserialized isn't the right word. I think you mean an i1 which must be an in SGPR/condition register. Maybe isBoolSGPR or something?


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:5127-5135
+  auto CRHS = dyn_cast<ConstantSDNode>(RHS);
+  if (!CRHS) {
+    CRHS = dyn_cast<ConstantSDNode>(LHS);
+    if (CRHS) {
+      std::swap(LHS, RHS);
+      CC = getSetCCSwappedOperands(CC);
+    }
----------------
Constants are canonicalized to the RHS as is, you shouldn't' need to handle this here


https://reviews.llvm.org/D34545





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