[PATCH] D34366: [AMDGPU] Add infer address spaces pass before SROA

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec updated this revision to Diff 103116.
rampitec marked an inline comment as done.
rampitec added a comment.

Added requested comment.


Repository:
  rL LLVM

https://reviews.llvm.org/D34366

Files:
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll


Index: test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
@@ -0,0 +1,10 @@
+; RUN: opt -mtriple=amdgcn--amdhsa -disable-output -disable-verify -debug-pass=Structure -O2 %s 2>&1 | FileCheck -check-prefix=GCN %s
+
+; GCN: Function Integration/Inlining
+; GCN: FunctionPass Manager
+; GCN: Infer address spaces
+; GCN: SROA
+
+define void @empty() {
+  ret void
+}
Index: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -342,6 +342,14 @@
         PM.add(createAMDGPUExternalAAWrapperPass());
       }
   });
+
+  Builder.addExtension(
+    PassManagerBuilder::EP_CGSCCOptimizerLate,
+    [](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
+      // Add infer addressspaces pass to the opt pipeline after inlining
+      // but before SROA to increase SROA opportunities.
+      PM.add(createInferAddressSpacesPass());
+  });
 }
 
 //===----------------------------------------------------------------------===//


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