[PATCH] D34366: [AMDGPU] Add infer address spaces pass before SROA

[Matt Arsenault via Phabricator via llvm-commits]

arsenm requested changes to this revision.
arsenm added inline comments.
This revision now requires changes to proceed.


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Comment at: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:346-349
+  Builder.addExtension(
+    PassManagerBuilder::EP_CGSCCOptimizerLate,
+    [](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
+      PM.add(createInferAddressSpacesPass());
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Should add a comment explaining this


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Comment at: test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll:1
+; RUN: opt -mtriple=amdgcn--amdhsa -disable-output -disable-verify -debug-pass=Structure -O2 %s 2>&1 | FileCheck -check-prefix=GCN %s
+
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Why disable verify?


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Comment at: test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll:1
+; RUN: opt -mtriple=amdgcn--amdhsa -disable-output -disable-verify -debug-pass=Structure -O2 %s 2>&1 | FileCheck -check-prefix=GCN %s
+
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arsenm wrote:
> Why disable verify?
I'm not sure if this requires asserts for the -debug-pass to work, but it might


Repository:
  rL LLVM

https://reviews.llvm.org/D34366