[PATCH] D33866: [DAGCombiner] loosen restriction for creating narrow vector load from extract(wide load)

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 5 11:52:15 PDT 2017


efriedma added a comment.

The diffs to the ARM tests are clearly no good: you're splitting 128-bit vector loads into two 64-bit vector loads for no benefit.

You're generating fewer instructions on x86, but it's not obvious it's beneficial; you get rid of the EXTRACT_SUBVECTOR operations, but the end result is a lot more instructions with memory operands.



================
Comment at: test/CodeGen/AArch64/arm64-vabs.ll:141
 ; CHECK-LABEL: uabdl8h_rdx
-; CHECK: uabdl2.8h
+; CHECK: uabdl.8h
 ; CHECK: uabdl.8h
----------------
We need to generate more complete checks for these tests... but I would guess this is adding extra instructions.


https://reviews.llvm.org/D33866





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