[PATCH] D31851: [PowerPC] Eliminate compares - add handling for logical operations without the use of condition registers
Eric Christopher via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 28 23:02:19 PDT 2017
echristo added a comment.
couple of inline comments.
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Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2570
+// achieved with xor %a, -1).
+SDValue PPCDAGToDAGISel::getLogicOpInGPR(SDValue LogicOp) {
+ assert(isLogicOp(LogicOp.getOpcode()) &&
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Maybe "computeLogicOpInGPR"?
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Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2701-2703
+ // Extract the value to a CR bit. If this is a bitwise negation, we simply
+ // extract the EQ bit rather than actually negating the bit set. The logic
+ // is rather simple - the EQ bit is set when the input value is zero.
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I think you mean "single bit" rather than "CR bit" at least I'm reading it that way rather than in a cc register right?
Repository:
rL LLVM
https://reviews.llvm.org/D31851
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