[llvm] r303778 - Move machine-cse-physreg.mir to test/CodeGen/Thumb

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Wed May 24 10:20:47 PDT 2017


Author: kparzysz
Date: Wed May 24 12:20:47 2017
New Revision: 303778

URL: http://llvm.org/viewvc/llvm-project?rev=303778&view=rev
Log:
Move machine-cse-physreg.mir to test/CodeGen/Thumb

Added:
    llvm/trunk/test/CodeGen/Thumb/machine-cse-physreg.mir
Removed:
    llvm/trunk/test/CodeGen/MIR/Generic/machine-cse-physreg.mir

Removed: llvm/trunk/test/CodeGen/MIR/Generic/machine-cse-physreg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/machine-cse-physreg.mir?rev=303777&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/machine-cse-physreg.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/machine-cse-physreg.mir (removed)
@@ -1,35 +0,0 @@
-# RUN: llc -mtriple thumbv5e -run-pass=machine-cse -o - %s | FileCheck %s
-
-# This is a contrived example made to expose a bug in
-# MachineCSE, see PR32538.
-
-# MachineCSE must not remove this def of %cpsr:
-# CHECK-LABEL: bb.1:
-# CHECK: , %cpsr = tLSLri
-
-...
----
-name:            spam
-registers:
-  - { id: 0, class: tgpr }
-  - { id: 1, class: tgpr }
-  - { id: 2, class: tgpr }
-  - { id: 3, class: tgpr }
-liveins:
-  - { reg: '%r0', virtual-reg: '%0' }
-body:             |
-  bb.0:
-    liveins: %r0
-    %0 = COPY %r0
-    %1, %cpsr = tLSLri %0, 2, 14, _
-    tCMPi8 %0, 5, 14, _, implicit-def %cpsr
-    tBcc %bb.8, 8, %cpsr
-
-  bb.1:
-    %2, %cpsr = tLSLri %0, 2, 14, _
-
-  bb.8:
-    liveins: %cpsr
-    %3 = COPY %cpsr
-    tSTRi killed %3, %0, 0, 14, _
-...

Added: llvm/trunk/test/CodeGen/Thumb/machine-cse-physreg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/machine-cse-physreg.mir?rev=303778&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb/machine-cse-physreg.mir (added)
+++ llvm/trunk/test/CodeGen/Thumb/machine-cse-physreg.mir Wed May 24 12:20:47 2017
@@ -0,0 +1,35 @@
+# RUN: llc -mtriple thumbv5e -run-pass=machine-cse -o - %s | FileCheck %s
+
+# This is a contrived example made to expose a bug in
+# MachineCSE, see PR32538.
+
+# MachineCSE must not remove this def of %cpsr:
+# CHECK-LABEL: bb.1:
+# CHECK: , %cpsr = tLSLri
+
+...
+---
+name:            spam
+registers:
+  - { id: 0, class: tgpr }
+  - { id: 1, class: tgpr }
+  - { id: 2, class: tgpr }
+  - { id: 3, class: tgpr }
+liveins:
+  - { reg: '%r0', virtual-reg: '%0' }
+body:             |
+  bb.0:
+    liveins: %r0
+    %0 = COPY %r0
+    %1, %cpsr = tLSLri %0, 2, 14, _
+    tCMPi8 %0, 5, 14, _, implicit-def %cpsr
+    tBcc %bb.8, 8, %cpsr
+
+  bb.1:
+    %2, %cpsr = tLSLri %0, 2, 14, _
+
+  bb.8:
+    liveins: %cpsr
+    %3 = COPY %cpsr
+    tSTRi killed %3, %0, 0, 14, _
+...




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