[PATCH] D32422: LoopVectorizer: let target prefer scalar addressing computations (+ minor improvements in SystemZTTI)

Jonas Paulsson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 24 03:20:27 PDT 2017


jonpa added inline comments.


================
Comment at: lib/Transforms/Vectorize/LoopVectorize.cpp:7308
+      if (PtrDef && TheLoop->contains(PtrDef) &&
+          getWideningDecision(&I, VF) != CM_GatherScatter)
+        AddrDefs.insert(PtrDef);
----------------
delena wrote:
> At this point you may have "interleave" decision. I assume, you have nothing to do with it.
> I'd check getWideningDecision(&I, VF) == CM_Scalarize)
As explained before, there are just a few loops that this relates to. When I tried to handle only CM_Scalarize like you suggested, it changed just 17 loops, but it seemed to be just a bit better to do the interleaved accessess as well. 

I believe in this case the the address is scalar, but that register is also used for something else. That means that it ends up in a vector register and has to be extracted.

The reason I would also like to see this is as explained before that due to LSR, it is generally better if all else same to keep addressing scalar.



================
Comment at: lib/Transforms/Vectorize/LoopVectorize.cpp:7321
+        if ((InstOp->getParent() == I->getParent()) && !isa<PHINode>(InstOp) &&
+            AddrDefs.insert(InstOp).second == true)
+          Worklist.push_back(InstOp);
----------------
delena wrote:
> AddrDefs.insert(InstOp).second == true)  -> AddrDefs.count(InstOp)
no - I want to insert InstOp into AddrDefs if it isn't there, right?


https://reviews.llvm.org/D32422





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