[llvm] r303108 - AArch64: diagnose unrecognized features in .cpu directive.
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Mon May 15 12:42:16 PDT 2017
Author: tnorthover
Date: Mon May 15 14:42:15 2017
New Revision: 303108
URL: http://llvm.org/viewvc/llvm-project?rev=303108&view=rev
Log:
AArch64: diagnose unrecognized features in .cpu directive.
We were silently ignoring any features we couldn't match up, which led to
errors in an inline asm block missing the conventional "\n\t".
Added:
llvm/trunk/test/MC/AArch64/directive-cpu-err.s
Modified:
llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=303108&r1=303107&r2=303108&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Mon May 15 14:42:15 2017
@@ -3904,10 +3904,14 @@ bool AArch64AsmParser::parseDirectiveArc
return false;
}
+static SMLoc incrementLoc(SMLoc L, int Offset) {
+ return SMLoc::getFromPointer(L.getPointer() + Offset);
+}
+
/// parseDirectiveCPU
/// ::= .cpu id
bool AArch64AsmParser::parseDirectiveCPU(SMLoc L) {
- SMLoc CPULoc = getLoc();
+ SMLoc CurLoc = getLoc();
StringRef CPU, ExtensionString;
std::tie(CPU, ExtensionString) =
@@ -3923,15 +3927,19 @@ bool AArch64AsmParser::parseDirectiveCPU
// FIXME This is using tablegen data, but should be moved to ARMTargetParser
// once that is tablegen'ed
if (!getSTI().isCPUStringValid(CPU)) {
- Error(CPULoc, "unknown CPU name");
+ Error(CurLoc, "unknown CPU name");
return false;
}
MCSubtargetInfo &STI = copySTI();
STI.setDefaultFeatures(CPU, "");
+ CurLoc = incrementLoc(CurLoc, CPU.size());
FeatureBitset Features = STI.getFeatureBits();
for (auto Name : RequestedExtensions) {
+ // Advance source location past '+'.
+ CurLoc = incrementLoc(CurLoc, 1);
+
bool EnableFeature = true;
if (Name.startswith_lower("no")) {
@@ -3939,6 +3947,7 @@ bool AArch64AsmParser::parseDirectiveCPU
Name = Name.substr(2);
}
+ bool FoundExtension = false;
for (const auto &Extension : ExtensionMap) {
if (Extension.Name != Name)
continue;
@@ -3952,9 +3961,15 @@ bool AArch64AsmParser::parseDirectiveCPU
uint64_t Features =
ComputeAvailableFeatures(STI.ToggleFeature(ToggleFeatures));
setAvailableFeatures(Features);
+ FoundExtension = true;
break;
}
+
+ if (!FoundExtension)
+ Error(CurLoc, "unsupported architectural extension");
+
+ CurLoc = incrementLoc(CurLoc, Name.size());
}
return false;
}
Added: llvm/trunk/test/MC/AArch64/directive-cpu-err.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/directive-cpu-err.s?rev=303108&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/directive-cpu-err.s (added)
+++ llvm/trunk/test/MC/AArch64/directive-cpu-err.s Mon May 15 14:42:15 2017
@@ -0,0 +1,9 @@
+// RUN: not llvm-mc -triple aarch64-linux-gnu %s 2> %t > /dev/null
+// RUN: FileCheck %s < %t
+
+ .cpu invalid
+ // CHECK: error: unknown CPU name
+
+ .cpu generic+wibble+nowobble
+ // CHECK: :[[@LINE-1]]:18: error: unsupported architectural extension
+ // CHECK: :[[@LINE-2]]:25: error: unsupported architectural extension
More information about the llvm-commits
mailing list