[PATCH] D33172: [InstCombine] Simpify inverted predicates in 'or'
Davide Italiano via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 14 22:52:01 PDT 2017
davide requested changes to this revision.
davide added a comment.
This revision now requires changes to proceed.
After giving some more careful thought, I'm not necessarily sure `InstCombine` is the right pass to solve this problem (or at least, there's an alternative solution).
I've been convincing myself this is a value-range propagation/copy-propagation problem, and in fact, this is how GCC optimizes this code.
If I understand correctly, you start with some C code that looks like this: https://godbolt.org/g/0HBds4
Now you have some pseudo-IR that looks like this (actually, this is GIMPLE, so we can map to something real :))
<bb 2>:
if (a_3(D) < b_4(D))
goto <bb 4>;
else
goto <bb 3>;
<bb 3>:
<bb 4>:
# iftmp.0_1 = PHI <c_5(D)(2), 0(3)>
if (a_3(D) >= b_4(D))
goto <bb 6>;
else
goto <bb 5>;
<bb 5>:
<bb 6>:
# iftmp.1_2 = PHI <d_6(D)(4), 0(5)>
_7 = iftmp.0_1 | iftmp.1_2;
return _7;
your VRP algorithm can prove after SSA replacement (where LHS replaces RHS)
a_9 -> { a_3(D) }
a_10 -> { a_3(D) }
b_11 -> { b_4(D) }
b_12 -> { b_4(D) }
that your SSA values have the following ranges:
a_9: [-INF, b_4(D) + -1]
a_10: [b_4(D), +INF]
b_11: [a_9 + 1, +INF]
b_12: [-INF, a_10]
therefore removing `bb4` and transforming your IR into:
<bb 2>:
if (a_3(D) < b_4(D))
goto <bb 5>;
else
goto <bb 4>;
<bb 3>:
# iftmp.1_2 = PHI <0(5), d_6(D)(4)>
# iftmp.0_15 = PHI <iftmp.0_14(5), iftmp.0_13(4)>
_7 = iftmp.0_15 | iftmp.1_2;
return _7;
<bb 4>:
# iftmp.0_13 = PHI <0(2)>
goto <bb 3>;
<bb 5>:
# iftmp.0_14 = PHI <c_5(D)(2)>
goto <bb 3>;
(at that point you have a bunch of trivial phi nodes that probably copy propagation or something else could clean up, you get the idea).
https://reviews.llvm.org/D33172
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