[PATCH] D32869: [globalisel][tablegen] Require that all registers between instructions of a match are virtual.

[Quentin Colombet via Phabricator via llvm-commits]

qcolombet added a comment.

If that happens, doesn't that means we need to support it?

The way I was thinking about this was that we should be able to insert copy to vreg before and after to assign to and from the physical registers.


https://reviews.llvm.org/D32869