[PATCH] D32394: Add extra operand to CALLSEQ_START to keep frame part set up previously
Serge Pavlov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 2 09:39:13 PDT 2017
sepavloff updated this revision to Diff 97461.
sepavloff added a comment.
Addressed reviewer's notes and rebased.
https://reviews.llvm.org/D32394
Files:
include/llvm/CodeGen/ISDOpcodes.h
include/llvm/CodeGen/SelectionDAG.h
include/llvm/Target/TargetInstrInfo.h
include/llvm/Target/TargetSelectionDAG.td
lib/CodeGen/MachineVerifier.cpp
lib/CodeGen/SelectionDAG/FastISel.cpp
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
lib/Target/AArch64/AArch64CallLowering.cpp
lib/Target/AArch64/AArch64FastISel.cpp
lib/Target/AArch64/AArch64ISelLowering.cpp
lib/Target/AArch64/AArch64InstrInfo.td
lib/Target/ARM/ARMBaseInstrInfo.h
lib/Target/ARM/ARMCallLowering.cpp
lib/Target/ARM/ARMFastISel.cpp
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/ARMInstrThumb.td
lib/Target/AVR/AVRFrameLowering.cpp
lib/Target/AVR/AVRISelLowering.cpp
lib/Target/AVR/AVRInstrInfo.td
lib/Target/BPF/BPFISelLowering.cpp
lib/Target/BPF/BPFInstrInfo.td
lib/Target/Hexagon/HexagonISelLowering.cpp
lib/Target/Hexagon/HexagonPatterns.td
lib/Target/Hexagon/HexagonPseudo.td
lib/Target/Lanai/LanaiISelLowering.cpp
lib/Target/Lanai/LanaiInstrInfo.td
lib/Target/MSP430/MSP430FrameLowering.cpp
lib/Target/MSP430/MSP430ISelLowering.cpp
lib/Target/MSP430/MSP430InstrInfo.h
lib/Target/MSP430/MSP430InstrInfo.td
lib/Target/Mips/MipsFastISel.cpp
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsInstrInfo.td
lib/Target/NVPTX/NVPTXISelLowering.cpp
lib/Target/NVPTX/NVPTXInstrInfo.td
lib/Target/PowerPC/PPCFastISel.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCInstrInfo.td
lib/Target/PowerPC/PPCTLSDynamicCall.cpp
lib/Target/Sparc/SparcISelLowering.cpp
lib/Target/Sparc/SparcInstrInfo.td
lib/Target/SystemZ/SystemZISelLowering.cpp
lib/Target/SystemZ/SystemZInstrInfo.td
lib/Target/SystemZ/SystemZOperators.td
lib/Target/WebAssembly/WebAssemblyInstrCall.td
lib/Target/WebAssembly/WebAssemblyInstrInfo.td
lib/Target/X86/X86FastISel.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrCompiler.td
lib/Target/X86/X86InstrInfo.h
lib/Target/X86/X86InstrInfo.td
lib/Target/XCore/XCoreISelLowering.cpp
lib/Target/XCore/XCoreInstrInfo.td
test/CodeGen/AArch64/GlobalISel/call-translator.ll
test/CodeGen/AArch64/stackmap-frame-setup.ll
test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
test/CodeGen/Hexagon/regalloc-bad-undef.mir
test/CodeGen/Lanai/peephole-compare.mir
test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
test/CodeGen/PowerPC/stackmap-frame-setup.ll
test/CodeGen/X86/stackmap-frame-setup.ll
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