[PATCH] D32533: [SLPVectorizer] Limit the number of block chain instructions to max register size

[Anna Thomas via Phabricator via llvm-commits]

anna added a comment.

okay, that explains why we do limit to the target vector register *only* for the store chain in SLP (compile time benefit). However, if we look at the Loop Vectorizer, we consider the maximum vector register size when generating the code in the IR. This also gives a more accurate cost model for LV.

Not considering the physical vector register size is limiting the SLP cost model right? For example, in the target, we would have 4 shuffles instead of a single shuffle.


https://reviews.llvm.org/D32533