[PATCH] D32533: [SLPVectorizer] Limit the number of block chain instructions to max register size

[Matthew Simpson via Phabricator via llvm-commits]

mssimpso added a comment.

In https://reviews.llvm.org/D32533#738049, @anna wrote:

> @mssimpso Is this correct? Also, I would like to know the design philosophy behind having the large vector sizes, and allowing LLC to find the correct vector register size.


As far as I know, this is correct. The vectorizers are generally allowed (and do in some cases) create vectors that are wider than the physical vector register size of the target. The backend is supposed to know how to split them up into legal sizes. The min/max vector register size options in SLP, can use some work, though (see https://reviews.llvm.org/D31965 and the TODO on line 325). I think they are primarily used to narrow the search space for compile-time savings. But I think we currently only do this for store-rooted trees (vectorizeStores).


https://reviews.llvm.org/D32533