[PATCH] D32247: Switch AArch64 to use reduction intrinsics

[Renato Golin via Phabricator via llvm-commits]

rengolin added a comment.

As soon as the dependency patch is approved, this one looks ok.

Did you submit the patch that will make the MC layer recognise these patterns into the actual instructions?



================
Comment at: lib/Target/AArch64/AArch64TargetTransformInfo.cpp:690
+  case Instruction::Add:
+    return Ty->getScalarSizeInBits() * Ty->getVectorNumElements() >= 128;
+  default:
----------------
For now, shouldn't this be `== 128`?


Repository:
  rL LLVM

https://reviews.llvm.org/D32247