[llvm] r301107 - [X86] Convert test checks to generated checks of update_llc_test_checks.py. NFC
Ayman Musa via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 23 00:41:40 PDT 2017
Author: aymanmus
Date: Sun Apr 23 02:41:40 2017
New Revision: 301107
URL: http://llvm.org/viewvc/llvm-project?rev=301107&view=rev
Log:
[X86] Convert test checks to generated checks of update_llc_test_checks.py. NFC
Modified:
llvm/trunk/test/CodeGen/X86/vector-pcmp.ll
Modified: llvm/trunk/test/CodeGen/X86/vector-pcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-pcmp.ll?rev=301107&r1=301106&r2=301107&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-pcmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-pcmp.ll Sun Apr 23 02:41:40 2017
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
@@ -19,7 +19,6 @@ define <16 x i8> @test_pcmpgtb(<16 x i8>
; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
-;
%sign = ashr <16 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
ret <16 x i8> %not
@@ -37,7 +36,6 @@ define <8 x i16> @test_pcmpgtw(<8 x i16>
; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
-;
%sign = ashr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
%not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
ret <8 x i16> %not
@@ -55,7 +53,6 @@ define <4 x i32> @test_pcmpgtd(<4 x i32>
; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
-;
%sign = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
%not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1>
ret <4 x i32> %not
@@ -81,7 +78,6 @@ define <2 x i64> @test_pcmpgtq(<2 x i64>
; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
-;
%sign = ashr <2 x i64> %x, <i64 63, i64 63>
%not = xor <2 x i64> %sign, <i64 -1, i64 -1>
ret <2 x i64> %not
@@ -132,7 +128,6 @@ define <1 x i128> @test_strange_type(<1
; AVX2-NEXT: vmovq %xmm0, %rax
; AVX2-NEXT: vpextrq $1, %xmm0, %rdx
; AVX2-NEXT: retq
-;
%sign = ashr <1 x i128> %x, <i128 127>
%not = xor <1 x i128> %sign, <i128 -1>
ret <1 x i128> %not
@@ -163,7 +158,6 @@ define <32 x i8> @test_pcmpgtb_256(<32 x
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%sign = ashr <32 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%not = xor <32 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
ret <32 x i8> %not
@@ -193,7 +187,6 @@ define <16 x i16> @test_pcmpgtw_256(<16
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%sign = ashr <16 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
%not = xor <16 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
ret <16 x i16> %not
@@ -223,7 +216,6 @@ define <8 x i32> @test_pcmpgtd_256(<8 x
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%sign = ashr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
%not = xor <8 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
ret <8 x i32> %not
@@ -266,7 +258,6 @@ define <4 x i64> @test_pcmpgtq_256(<4 x
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%sign = ashr <4 x i64> %x, <i64 63, i64 63, i64 63, i64 63>
%not = xor <4 x i64> %sign, <i64 -1, i64 -1, i64 -1, i64 -1>
ret <4 x i64> %not
@@ -284,7 +275,6 @@ define <16 x i8> @cmpeq_zext_v16i8(<16 x
; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
-;
%cmp = icmp eq <16 x i8> %a, %b
%zext = zext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %zext
@@ -314,7 +304,6 @@ define <16 x i16> @cmpeq_zext_v16i16(<16
; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpsrlw $15, %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%cmp = icmp eq <16 x i16> %a, %b
%zext = zext <16 x i1> %cmp to <16 x i16>
ret <16 x i16> %zext
@@ -332,7 +321,6 @@ define <4 x i32> @cmpeq_zext_v4i32(<4 x
; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpsrld $31, %xmm0, %xmm0
; AVX-NEXT: retq
-;
%cmp = icmp eq <4 x i32> %a, %b
%zext = zext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %zext
@@ -375,7 +363,6 @@ define <4 x i64> @cmpeq_zext_v4i64(<4 x
; AVX2-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpsrlq $63, %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%cmp = icmp eq <4 x i64> %a, %b
%zext = zext <4 x i1> %cmp to <4 x i64>
ret <4 x i64> %zext
@@ -406,7 +393,6 @@ define <32 x i8> @cmpgt_zext_v32i8(<32 x
; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%cmp = icmp sgt <32 x i8> %a, %b
%zext = zext <32 x i1> %cmp to <32 x i8>
ret <32 x i8> %zext
@@ -424,7 +410,6 @@ define <8 x i16> @cmpgt_zext_v8i16(<8 x
; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpsrlw $15, %xmm0, %xmm0
; AVX-NEXT: retq
-;
%cmp = icmp sgt <8 x i16> %a, %b
%zext = zext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %zext
@@ -454,7 +439,6 @@ define <8 x i32> @cmpgt_zext_v8i32(<8 x
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0
; AVX2-NEXT: retq
-;
%cmp = icmp sgt <8 x i32> %a, %b
%zext = zext <8 x i1> %cmp to <8 x i32>
ret <8 x i32> %zext
@@ -488,7 +472,6 @@ define <2 x i64> @cmpgt_zext_v2i64(<2 x
; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpsrlq $63, %xmm0, %xmm0
; AVX-NEXT: retq
-;
%cmp = icmp sgt <2 x i64> %a, %b
%zext = zext <2 x i1> %cmp to <2 x i64>
ret <2 x i64> %zext
More information about the llvm-commits
mailing list