[PATCH] D24623: [AMDGPU] Implement memory model
Tony Tye via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 17 21:23:03 PDT 2017
t-tye added inline comments.
================
Comment at: lib/Target/AMDGPU/SIMemoryLegalizer.cpp:277
+ ++MI;
+ Changed |= InsertWaitcntVmcnt0(MI);
+ Changed |= InsertBufferWbinvl1Vol(MI);
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Is this needed only if the the instruction is a VMEM or FLAT instruction, not if a DS? It is only ensuring that the load has completed before doing the VMEM invalidate.
https://reviews.llvm.org/D24623
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