[PATCH] D32127: ARM: Use methods to access data stored with frame instructions
Serge Pavlov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 17 10:37:37 PDT 2017
sepavloff created this revision.
Herald added subscribers: rengolin, aemerson.
In r300196 several methods were added to TarfetInstrInfo to access
data stored with call frame setup/destroy instructions. This change
replaces calls to getOperand with calls to such special methods in
ARM target.
This patch is essentially NFC, it is needed to simplify subsequent
changes.
https://reviews.llvm.org/D32127
Files:
lib/Target/ARM/ARMBaseInstrInfo.h
lib/Target/ARM/ARMFrameLowering.cpp
lib/Target/ARM/Thumb1FrameLowering.cpp
Index: lib/Target/ARM/Thumb1FrameLowering.cpp
===================================================================
--- lib/Target/ARM/Thumb1FrameLowering.cpp
+++ lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -83,13 +83,12 @@
// ADJCALLSTACKUP -> add, sp, sp, amount
MachineInstr &Old = *I;
DebugLoc dl = Old.getDebugLoc();
- unsigned Amount = Old.getOperand(0).getImm();
+ unsigned Amount = TII.getFrameSize(Old);
if (Amount != 0) {
// We need to keep the stack aligned properly. To do this, we round the
// amount of space needed for the outgoing arguments up to the next
// alignment boundary.
- unsigned Align = getStackAlignment();
- Amount = (Amount+Align-1)/Align*Align;
+ Amount = alignTo(Amount, getStackAlignment());
// Replace the pseudo instruction with a new instruction...
unsigned Opc = Old.getOpcode();
Index: lib/Target/ARM/ARMFrameLowering.cpp
===================================================================
--- lib/Target/ARM/ARMFrameLowering.cpp
+++ lib/Target/ARM/ARMFrameLowering.cpp
@@ -1958,7 +1958,7 @@
// ADJCALLSTACKUP -> add, sp, sp, amount
MachineInstr &Old = *I;
DebugLoc dl = Old.getDebugLoc();
- unsigned Amount = Old.getOperand(0).getImm();
+ unsigned Amount = TII.getFrameSize(Old);
if (Amount != 0) {
// We need to keep the stack aligned properly. To do this, we round the
// amount of space needed for the outgoing arguments up to the next
@@ -1976,14 +1976,11 @@
ARMCC::CondCodes Pred =
(PIdx == -1) ? ARMCC::AL
: (ARMCC::CondCodes)Old.getOperand(PIdx).getImm();
+ unsigned PredReg = TII.getFramePred(Old);
if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) {
- // Note: PredReg is operand 2 for ADJCALLSTACKDOWN.
- unsigned PredReg = Old.getOperand(2).getReg();
emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, MachineInstr::NoFlags,
Pred, PredReg);
} else {
- // Note: PredReg is operand 3 for ADJCALLSTACKUP.
- unsigned PredReg = Old.getOperand(3).getReg();
assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP);
emitSPUpdate(isARM, MBB, I, dl, TII, Amount, MachineInstr::NoFlags,
Pred, PredReg);
Index: lib/Target/ARM/ARMBaseInstrInfo.h
===================================================================
--- lib/Target/ARM/ARMBaseInstrInfo.h
+++ lib/Target/ARM/ARMBaseInstrInfo.h
@@ -404,6 +404,27 @@
/// Returns true if the instruction has a shift by immediate that can be
/// executed in one cycle less.
bool isSwiftFastImmShift(const MachineInstr *MI) const;
+
+ /// Returns predicate register associated with the given frame instruction.
+ unsigned getFramePred(const MachineInstr &MI) const {
+ assert(isFrameInstr(MI));
+ if (isFrameSetup(MI))
+ // Operands of ADJCALLSTACKDOWN:
+ // - argument declared in ADJCALLSTACKDOWN pattern:
+ // 0 - frame size
+ // 1 - predicate code (like ARMCC::AL)
+ // - added by predOps:
+ // 2 - predicate reg
+ return MI.getOperand(2).getReg();
+ // Operands of ADJCALLSTACKUP:
+ // - argument declared in ADJCALLSTACKUP pattern:
+ // 0 - frame size
+ // 1 - arg of CALLSEQ_END
+ // 2 - predicate code
+ // - added by predOps:
+ // 3 - predicate reg
+ return MI.getOperand(3).getReg();
+ }
};
/// Get the operands corresponding to the given \p Pred value. By default, the
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