[llvm] r300318 - [AMDGPU][MC] Enabled constants for src operands of s_cbranch_g_fork

Dmitry Preobrazhensky via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 14 04:52:27 PDT 2017


Author: dpreobra
Date: Fri Apr 14 06:52:26 2017
New Revision: 300318

URL: http://llvm.org/viewvc/llvm-project?rev=300318&view=rev
Log:
[AMDGPU][MC] Enabled constants for src operands of s_cbranch_g_fork

Fixed bug 32619: https://bugs.llvm.org//show_bug.cgi?id=32619

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D31973

Added:
    llvm/trunk/test/MC/AMDGPU/sop2-err.s
Modified:
    llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td
    llvm/trunk/test/MC/AMDGPU/sop2.s

Modified: llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td?rev=300318&r1=300317&r2=300318&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td Fri Apr 14 06:52:26 2017
@@ -434,7 +434,7 @@ def S_BFE_I64 : SOP2_64_32 <"s_bfe_i64">
 
 def S_CBRANCH_G_FORK : SOP2_Pseudo <
   "s_cbranch_g_fork", (outs),
-  (ins SReg_64:$src0, SReg_64:$src1),
+  (ins SCSrc_b64:$src0, SCSrc_b64:$src1),
   "$src0, $src1"
 > {
   let has_sdst = 0;

Added: llvm/trunk/test/MC/AMDGPU/sop2-err.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/sop2-err.s?rev=300318&view=auto
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/sop2-err.s (added)
+++ llvm/trunk/test/MC/AMDGPU/sop2-err.s Fri Apr 14 06:52:26 2017
@@ -0,0 +1,7 @@
+// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN %s
+
+s_cbranch_g_fork 100, s[6:7]
+// GCN: error: invalid operand for instruction
+
+s_cbranch_g_fork s[6:7], 100
+// GCN: error: invalid operand for instruction

Modified: llvm/trunk/test/MC/AMDGPU/sop2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/sop2.s?rev=300318&r1=300317&r2=300318&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/sop2.s (original)
+++ llvm/trunk/test/MC/AMDGPU/sop2.s Fri Apr 14 06:52:26 2017
@@ -160,6 +160,14 @@ s_cbranch_g_fork s[4:5], s[6:7]
 // SICI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x95]
 // VI:   s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x94]
 
+s_cbranch_g_fork 1, s[6:7]
+// SICI: s_cbranch_g_fork 1, s[6:7] ; encoding: [0x81,0x06,0x80,0x95]
+// VI:   s_cbranch_g_fork 1, s[6:7] ; encoding: [0x81,0x06,0x80,0x94]
+
+s_cbranch_g_fork s[6:7], 2
+// SICI: s_cbranch_g_fork s[6:7], 2 ; encoding: [0x06,0x82,0x80,0x95]
+// VI:   s_cbranch_g_fork s[6:7], 2 ; encoding: [0x06,0x82,0x80,0x94]
+
 s_absdiff_i32 s2, s4, s6
 // SICI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x96]
 // VI:   s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x95]




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