[PATCH] D31872: AMDGPU: Minor SReg64 register class refactoring
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 10 15:28:21 PDT 2017
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.td:306
-def SReg_64 : RegisterClass<"AMDGPU", [v2i32, i64, f64, i1], 32,
+def SReg_64_WITH_SUBREGS : RegisterClass<"AMDGPU", [v2i32, i64, f64, i1], 32,
(add SReg_64_XEXEC, EXEC)> {
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kzhuravl wrote:
> arsenm wrote:
> > It would be less annoying to keep this with the same name and to rename the other one
> Which one?
I mean SReg_64 remains as it is and add SReg_64_WithApertureRegs or something
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Comment at: lib/Target/AMDGPU/SIRegisterInfo.td:315
+ let CopyCost = 1;
+ let AllocationPriority = 8;
+}
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kzhuravl wrote:
> arsenm wrote:
> > The set with the aperture regs should be unallocatable
> `APERTURE_REGS` is `let isAllocatable = 0`.
The class containing it also needs to be unallocatable (so having the allocation priority set also doesn't make sense)
https://reviews.llvm.org/D31872
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