[PATCH] D31817: [ARM/AArch64] Ensure valid vector element types for interleaved accesses

[Matthew Simpson via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL299864: [ARM/AArch64] Ensure valid vector element types for interleaved accesses (authored by mssimpso).

Changed prior to commit:
  https://reviews.llvm.org/D31817?vs=94542&id=94710#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D31817

Files:
  llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
  llvm/trunk/lib/Target/ARM/ARMISelLowering.h
  llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp
  llvm/trunk/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses.ll
  llvm/trunk/test/Transforms/InterleavedAccess/ARM/interleaved-accesses.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D31817.94710.patch
Type: text/x-patch
Size: 12981 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170410/e1dbb855/attachment-0001.bin>