[PATCH] D31262: MIParser/MIRPrinter: Compute block successors if not explicitely specified

[Matthias Braun via Phabricator via llvm-commits]

MatzeB updated this revision to Diff 92724.
MatzeB added a comment.
Herald added a subscriber: nhaehnle.
Herald added a reviewer: javed.absar.

Updated:

- Actually remove nearly all the successors: lines from X86,ARM,AArch64 and AMDGPU tests
- Ignore phi block arguments now
- Fix a bug when condjump and fallthrough to the same block corner case: We would get the same successor twice instead of just one which MI expects.


Repository:
  rL LLVM

https://reviews.llvm.org/D31262

Files:
  lib/CodeGen/MIRParser/MIParser.cpp
  lib/CodeGen/MIRPrinter.cpp
  lib/CodeGen/MIRPrinter.h
  test/CodeGen/AArch64/arm64-regress-opt-cmp.mir
  test/CodeGen/AArch64/loh.mir
  test/CodeGen/AArch64/machine-copy-remove.mir
  test/CodeGen/AArch64/machine-sink-zr.mir
  test/CodeGen/AArch64/regcoal-physreg.mir
  test/CodeGen/AMDGPU/detect-dead-lanes.mir
  test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir
  test/CodeGen/AMDGPU/inserted-wait-states.mir
  test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
  test/CodeGen/AMDGPU/liveness.mir
  test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
  test/CodeGen/AMDGPU/rename-independent-subregs.mir
  test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
  test/CodeGen/AMDGPU/subreg-intervals.mir
  test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
  test/CodeGen/AMDGPU/waitcnt.mir
  test/CodeGen/ARM/ARMLoadStoreDBG.mir
  test/CodeGen/ARM/cmp1-peephole-thumb.mir
  test/CodeGen/ARM/cmp2-peephole-thumb.mir
  test/CodeGen/ARM/dbg-range-extension.mir
  test/CodeGen/MIR/Generic/branch-probabilities.ll
  test/CodeGen/MIR/X86/auto-successor.mir
  test/CodeGen/MIR/X86/branch-probabilities.mir
  test/CodeGen/MIR/X86/newline-handling.mir
  test/CodeGen/MIR/X86/successor-basic-blocks.mir
  test/CodeGen/X86/branchfolding-undef.mir
  test/CodeGen/X86/eflags-copy-expansion.mir
  test/CodeGen/X86/implicit-null-checks.mir
  test/CodeGen/X86/invalid-liveness.mir
  test/CodeGen/X86/machine-region-info.mir
  test/CodeGen/X86/pr27681.mir
  test/CodeGen/X86/pre-coalesce.mir
  test/CodeGen/X86/tail-call-conditional.mir

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