[PATCH] D29489: Optimize SETCC + VSEL of incompatible or illegal types
Jonas Paulsson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 13 01:25:07 PDT 2017
jonpa updated this revision to Diff 91521.
jonpa added a comment.
> Not by default, but adding a target tends to be quite trivial - you should be able to copy + tweak the arm or powerpc targets very easily.
> It'd be great if you could use the script and then commit the new systemz tests with the current codegen to trunk so that this patch can show the diff.
I am new to python, but I tried your suggestion, and it seems to work at least for these two test files. A minus is that the CHECKs end up between the two lines of arguments. I suppose I should rewrite the tests to have them on a single line and then re-generate? Do the changes to the script look ok?
I am still waiting for approval of the common code changes. Eli, are you happy with it now after I rewrote it per your suggestion?
/Jonas
https://reviews.llvm.org/D29489
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
lib/CodeGen/SelectionDAG/LegalizeTypes.h
lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
test/CodeGen/ARM/vuzp.ll
test/CodeGen/NVPTX/f16x2-instructions.ll
test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll
test/CodeGen/SystemZ/vec-cmpsel.ll
test/CodeGen/X86/2011-10-19-widen_vselect.ll
test/CodeGen/X86/2011-10-21-widen-cmp.ll
test/CodeGen/X86/psubus.ll
test/CodeGen/X86/vselect-pcmp.ll
utils/update_llc_test_checks.py
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