[PATCH] D30751: [MachineCopyForwarding] Add new pass to do register COPY forwarding at end of register allocation.

[Geoff Berry via Phabricator via llvm-commits]

gberry created this revision.
Herald added subscribers: mgorny, nhaehnle, nemanjai, jyknight.
Herald added a reviewer: javed.absar.

This is a simple MachineInstr-level copy forwarding pass.  It is meant to be
run after register allocation but before virtual registers have been remapped
to physical registers.  It forwards the source of COPYs to the users of their
destinations when doing so is legal, but otherwise leaves the program
unchanged.  For example:

  %vreg1 = COPY %vreg0
  ...
  ... = OP %vreg1

If

- the physical register assigned to %vreg0 has not been clobbered by the time of the use of %vreg1
- the register class constraints are satisfied
- the COPY def is the only value that reaches OP

then this pass replaces the above with:

  %vreg1 = COPY %vreg0
  ...
  ... = OP %vreg0

and updates the relevant state required by VirtRegMap (e.g. LiveIntervals).

This pass should not be confused with the mis-named MachineCopyPropagation
pass, which doesn't do copy propagation, but rather removes redunant/dead
copies.


https://reviews.llvm.org/D30751

Files:
  include/llvm/CodeGen/Passes.h
  include/llvm/InitializePasses.h
  lib/CodeGen/CMakeLists.txt
  lib/CodeGen/CodeGen.cpp
  lib/CodeGen/MachineCopyForwarding.cpp
  lib/CodeGen/TargetPassConfig.cpp
  test/CodeGen/AArch64/arm64-zero-cycle-regmov.ll
  test/CodeGen/AArch64/f16-instructions.ll
  test/CodeGen/AArch64/flags-multiuse.ll
  test/CodeGen/AArch64/merge-store-dependency.ll
  test/CodeGen/AArch64/neg-imm.ll
  test/CodeGen/AMDGPU/ret.ll
  test/CodeGen/ARM/atomic-op.ll
  test/CodeGen/ARM/swifterror.ll
  test/CodeGen/Hexagon/pred-absolute-store.ll
  test/CodeGen/PowerPC/fma-mutate.ll
  test/CodeGen/PowerPC/inlineasm-i64-reg.ll
  test/CodeGen/SPARC/atomics.ll
  test/CodeGen/Thumb/thumb-shrink-wrapping.ll
  test/CodeGen/X86/arg-copy-elide.ll
  test/CodeGen/X86/avx512-bugfix-25270.ll
  test/CodeGen/X86/avx512-calling-conv.ll
  test/CodeGen/X86/buildvec-insertvec.ll
  test/CodeGen/X86/combine-fcopysign.ll
  test/CodeGen/X86/complex-fastmath.ll
  test/CodeGen/X86/copy-propagation.ll
  test/CodeGen/X86/divide-by-constant.ll
  test/CodeGen/X86/fmaxnum.ll
  test/CodeGen/X86/fminnum.ll
  test/CodeGen/X86/fp128-i128.ll
  test/CodeGen/X86/haddsub-2.ll
  test/CodeGen/X86/haddsub-undef.ll
  test/CodeGen/X86/inline-asm-fpstack.ll
  test/CodeGen/X86/ipra-local-linkage.ll
  test/CodeGen/X86/localescape.ll
  test/CodeGen/X86/mul-i1024.ll
  test/CodeGen/X86/mul-i512.ll
  test/CodeGen/X86/mul128.ll
  test/CodeGen/X86/pmul.ll
  test/CodeGen/X86/powi.ll
  test/CodeGen/X86/pr11334.ll
  test/CodeGen/X86/pr29112.ll
  test/CodeGen/X86/shrink-wrap-chkstk.ll
  test/CodeGen/X86/sqrt-fastmath.ll
  test/CodeGen/X86/sse1.ll
  test/CodeGen/X86/sse3-avx-addsub-2.ll
  test/CodeGen/X86/statepoint-live-in.ll
  test/CodeGen/X86/statepoint-stack-usage.ll
  test/CodeGen/X86/vec_fp_to_int.ll
  test/CodeGen/X86/vec_int_to_fp.ll
  test/CodeGen/X86/vec_minmax_sint.ll
  test/CodeGen/X86/vec_shift4.ll
  test/CodeGen/X86/vector-blend.ll
  test/CodeGen/X86/vector-idiv-sdiv-128.ll
  test/CodeGen/X86/vector-idiv-udiv-128.ll
  test/CodeGen/X86/vector-rotate-128.ll
  test/CodeGen/X86/vector-sext.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-shift-lshr-128.ll
  test/CodeGen/X86/vector-shift-shl-128.ll
  test/CodeGen/X86/vector-shuffle-combining.ll
  test/CodeGen/X86/vector-trunc-math.ll
  test/CodeGen/X86/vector-zext.ll
  test/CodeGen/X86/vselect-minmax.ll
  test/CodeGen/X86/widen_conv-3.ll
  test/CodeGen/X86/widen_conv-4.ll
  test/CodeGen/X86/x86-shrink-wrap-unwind.ll
  test/CodeGen/X86/x86-shrink-wrapping.ll

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