[PATCH] D30661: [x86] Split MXCSR into two pseudo-registers

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> I suppose you are correct that this has a vulnerability to operations being DCE'd. I'm not sure preserving exception status from floating point operations whose results are never used is a critical use case. I guess that depends on the way we document the semantics of strict FP support. I'll have to think about that.

It's not just DCE which is problematic... we could also sink a floating-point operation past a read from the status register.  I suppose you could prevent that particular problem by making reads from the status register write to the control bits, but that causes its own problems.


Repository:
  rL LLVM

https://reviews.llvm.org/D30661