[PATCH] D30472: [DAGCombine] Simplify ISD::AND in GetDemandedBits.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:7441
+    APInt KnownZero, KnownOne;
+    DAG.computeKnownBits(V.getOperand(0), KnownZero, KnownOne);
+    if ((KnownOne & Mask) == Mask)
----------------
RKSimon wrote:
> How often are cases from each operand occurring? Since we canonicalize constants to the RHS would it be performant to test that first?
Does this still work with a check using isConstOrConstSplat(V.getOperand(1)) ? If so I'd go with that as what you have right now is probably overkill.


Repository:
  rL LLVM

https://reviews.llvm.org/D30472