[PATCH] D30044: [ARM] Enable SMLAL[B|T] instruction selection
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 1 15:55:55 PST 2017
efriedma added a comment.
(See also https://reviews.llvm.org/D30401 ; not sure if it conflicts.)
Could you split the change to match ARMISD::SMULWB earlier into a separate patch? (You can make this patch depend on that, if you want; it just makes it easier to review, or track down regressions, if changes are smaller.)
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:1503
+ if (TLO.SimplifyDemandedBits(N, OpIdx, APInt(32, 0xFFFF), DCI))
+ return N->getOperand(OpIdx);
+ return SDValue();
----------------
This is a weird way to use SimplifyDemandedBits; normally you would first generate the ARMISD::SMLALBB node, then separately run SimplifyDemandedBits on all ARMISD::SMLALBB nodes. It composes better with other optimizations (which might expose additional simplifications), and it's more obviously correct (it isn't clear whether N has other users).
https://reviews.llvm.org/D30044
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