[PATCH] D30044: [ARM] Enable SMLAL[B|T] instruction selection

Sam Parker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 1 08:14:00 PST 2017


samparker updated this revision to Diff 90180.
samparker added a comment.

A large change because I wanted to remove the new pattern helper file, so I've moved the smulwb, smulwt isel code from iseldag to lowering. The accumulator versions of those instructions are now handled in tablegen.

SimplifyDemandedBits is now used to get a signed 16-bit for the various instructions. I manually check LOAD and AssertSext nodes as these weren't handled by SimplifyDemandedBits.


https://reviews.llvm.org/D30044

Files:
  lib/Target/ARM/ARMISelDAGToDAG.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMISelLowering.h
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrThumb2.td
  test/CodeGen/ARM/longMAC.ll

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