[PATCH] D30400: For Thumb1, lower ADDC/ADDE/SUBC/SUBE via the glueless ARMISD nodes, same as already done for ARM and Thumb2.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> In Thumb1, we cannot define them separately

Why not?  "t2ADDSrr" is a pseudo-instruction, not an actual encoding.



================
Comment at: lib/Target/ARM/ARMISelDAGToDAG.cpp:3318
+          isAdd = !isAdd;
+        }
+        if (imm < 256) {
----------------
The old patterns don't handle SUBC with an immediate.  You can produce this situation with something like this:

```
long long x(long long a, int b) {
  return a - (((long long)b << 32) | -1U);
}
```

I think the handling here is correct, but please change it in a separate patch.  


https://reviews.llvm.org/D30400