[PATCH] D30216: GlobalISel: Translate ConstantDataVector

Kristof Beyls via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 28 11:32:11 PST 2017


kristof.beyls added inline comments.


================
Comment at: lib/CodeGen/GlobalISel/IRTranslator.cpp:988
+      Ops.push_back(getOrCreateVReg(Elt));
+      Indices.push_back(i * (CV->getElementByteSize() * 8));
+    }
----------------
dsanders wrote:
> This looks correct for ARM/AArch64/Mips, but I'm not sure this is correct for all targets. I'm thinking of big-endian targets where the highest-numbered element is stored at bit 0 (PowerPC?).
If this is not correct for some targets, there should at list be a FIXME here explaining in what circumstances the code isn't correct?


================
Comment at: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll:1193-1201
+define <2 x i32> @test_constant_datavector() {
+; CHECK-LABEL: name: test_constant_datavector
+; CHECK: [[ONE:%[0-9]+]](s32) = G_CONSTANT i32 1
+; CHECK: [[TWO:%[0-9]+]](s32) = G_CONSTANT i32 2
+; CHECK: [[RES:%[0-9]+]](<2 x s32>) = G_SEQUENCE [[ONE]](s32), 0, [[TWO]](s32), 32
+; CHECK: %d0 = COPY [[RES]](<2 x s32>)
+entry:
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dsanders wrote:
> I'd add a couple more tests, one for another vector size (preferably not a power of 2) and one for a different type and size like 'double'.
My guess is that non-power-of-2 vector sizes are too ill-supported to be able to write tests using them at the moment?
I'm currently starting to look into supporting non-power-of-2-sized types - it's looking like it may be quite a bit of work.


https://reviews.llvm.org/D30216





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