[llvm] r296471 - [ARM] GlobalISel: Select 32-bit G_CONSTANT
Diana Picus via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 28 05:05:42 PST 2017
Author: rovka
Date: Tue Feb 28 07:05:42 2017
New Revision: 296471
URL: http://llvm.org/viewvc/llvm-project?rev=296471&view=rev
Log:
[ARM] GlobalISel: Select 32-bit G_CONSTANT
Put it into a register by means of a MOVi.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
Modified: llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp?rev=296471&r1=296470&r2=296471&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp Tue Feb 28 07:05:42 2017
@@ -313,6 +313,17 @@ bool ARMInstructionSelector::select(Mach
I.setDesc(TII.get(ARM::ADDri));
MIB.addImm(0).add(predOps(ARMCC::AL)).add(condCodeOp());
break;
+ case G_CONSTANT: {
+ unsigned Reg = I.getOperand(0).getReg();
+ if (MRI.getType(Reg).getSizeInBits() != 32)
+ return false;
+
+ assert(RBI.getRegBank(Reg, MRI, TRI)->getID() == ARM::GPRRegBankID &&
+ "Expected constant to live in a GPR");
+ I.setDesc(TII.get(ARM::MOVi));
+ MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
+ break;
+ }
case G_STORE:
case G_LOAD: {
const auto &MemOp = **I.memoperands_begin();
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir?rev=296471&r1=296470&r2=296471&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir Tue Feb 28 07:05:42 2017
@@ -19,6 +19,7 @@
define void @test_stores() #0 { ret void }
define void @test_gep() { ret void }
+ define void @test_constants() { ret void }
define void @test_soft_fp_double() #0 { ret void }
@@ -466,6 +467,24 @@ body: |
BX_RET 14, _, implicit %r0
...
---
+name: test_constants
+# CHECK-LABEL: name: test_constants
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK: selected: true
+registers:
+ - { id: 0, class: gprb }
+# CHECK: id: [[C:[0-9]+]], class: gpr
+body: |
+ bb.0:
+ %0(s32) = G_CONSTANT 42
+ ; CHECK: %[[C]] = MOVi 42, 14, _, _
+
+ %r0 = COPY %0(s32)
+ BX_RET 14, _, implicit %r0
+...
+---
name: test_soft_fp_double
# CHECK-LABEL: name: test_soft_fp_double
legalized: true
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