[llvm] r296469 - [ARM] GlobalISel: Add mapping for G_CONSTANT

[Diana Picus via llvm-commits]

Author: rovka
Date: Tue Feb 28 06:13:58 2017
New Revision: 296469

URL: http://llvm.org/viewvc/llvm-project?rev=296469&view=rev
Log:
[ARM] GlobalISel: Add mapping for G_CONSTANT

Like G_FRAME_INDEX, G_CONSTANT has one register operand and one non-register
operand.

Modified:
    llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
    llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir

Modified: llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp?rev=296469&r1=296468&r2=296469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp Tue Feb 28 06:13:58 2017
@@ -240,6 +240,7 @@ ARMRegisterBankInfo::getInstrMapping(con
                           ? &ARM::ValueMappings[ARM::DPR3OpsIdx]
                           : &ARM::ValueMappings[ARM::SPR3OpsIdx];
     break;
+  case G_CONSTANT:
   case G_FRAME_INDEX:
     OperandsMapping =
         getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr});

Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir?rev=296469&r1=296468&r2=296469&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir Tue Feb 28 06:13:58 2017
@@ -10,6 +10,8 @@
 
   define void @test_gep() { ret void }
 
+  define void @test_constants() { ret void }
+
   define void @test_fadd_s32() #0 { ret void }
   define void @test_fadd_s64() #0 { ret void }
 
@@ -225,6 +227,22 @@ body:             |
     BX_RET 14, _, implicit %r0
 ...
 ---
+name:            test_constants
+# CHECK-LABEL: name: test_constants
+legalized:       true
+regBankSelected: false
+selected:        false
+# CHECK: registers:
+# CHECK: - { id: 0, class: gprb }
+registers:
+  - { id: 0, class: _ }
+body:             |
+  bb.0:
+    %0(s32) = G_CONSTANT 42
+    %r0 = COPY %0(s32)
+    BX_RET 14, _, implicit %r0
+...
+---
 name:            test_fadd_s32
 # CHECK-LABEL: name: test_fadd_s32
 legalized:       true