[PATCH] D29454: [DAGCombine] RFC: Recognise any_extend_vector_inreg and truncation style shuffle masks
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 16 07:00:57 PST 2017
RKSimon added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14245
+ return SDValue();
+ if (!IsAnyExtend(Scale))
+ continue;
----------------
delena wrote:
> lower case function name: isAnyExtend
Ah - missed that thanks - we're not very consistent when it comes to these.....
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14250
+ EVT OutVT = EVT::getVectorVT(*DAG.getContext(), OutSVT, NumElts / Scale);
+ if (!LegalOperations ||
+ TLI.isOperationLegalOrCustom(ISD::ANY_EXTEND_VECTOR_INREG, OutVT))
----------------
delena wrote:
> Is !LegalOperations important?
For these cases yes - currently ISD::ANY_EXTEND_VECTOR_INREG isn't supported by any targets as a legal/custom operation but should be soon.
Repository:
rL LLVM
https://reviews.llvm.org/D29454
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