[PATCH] D29454: [DAGCombine] RFC: Recognise any_extend_vector_inreg and truncation style shuffle masks

[Elena Demikhovsky via Phabricator via llvm-commits]

delena added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14243
+  for (unsigned Scale = 2; Scale < NumElts; Scale *= 2) {
+    if ((NumElts % Scale) != 0)
+      return SDValue();
----------------
This check can be removed.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14245
+      return SDValue();
+    if (!IsAnyExtend(Scale))
+      continue;
----------------
lower case function name: isAnyExtend


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14250
+    EVT OutVT = EVT::getVectorVT(*DAG.getContext(), OutSVT, NumElts / Scale);
+    if (!LegalOperations ||
+        TLI.isOperationLegalOrCustom(ISD::ANY_EXTEND_VECTOR_INREG, OutVT))
----------------
Is !LegalOperations important?


Repository:
  rL LLVM

https://reviews.llvm.org/D29454