[llvm] r295308 - [ARM] GlobalISel: Assert that we don't use the FPR bank if we don't have VFP
Diana Picus via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 16 03:25:09 PST 2017
Author: rovka
Date: Thu Feb 16 05:25:09 2017
New Revision: 295308
URL: http://llvm.org/viewvc/llvm-project?rev=295308&view=rev
Log:
[ARM] GlobalISel: Assert that we don't use the FPR bank if we don't have VFP
Modified:
llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
Modified: llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp?rev=295308&r1=295307&r2=295308&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp Thu Feb 16 05:25:09 2017
@@ -13,6 +13,7 @@
#include "ARMRegisterBankInfo.h"
#include "ARMInstrInfo.h" // For the register classes
+#include "ARMSubtarget.h"
#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -173,6 +174,17 @@ ARMRegisterBankInfo::getInstrMapping(con
return InstructionMapping{};
}
+#ifndef NDEBUG
+ for (unsigned i = 0; i < NumOperands; i++) {
+ for (const auto &Mapping : OperandsMapping[i]) {
+ assert(
+ (Mapping.RegBank->getID() != ARM::FPRRegBankID ||
+ MF.getSubtarget<ARMSubtarget>().hasVFP2()) &&
+ "Trying to use floating point register bank on target without vfp");
+ }
+ }
+#endif
+
return InstructionMapping{DefaultMappingID, /*Cost=*/1, OperandsMapping,
NumOperands};
}
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir?rev=295308&r1=295307&r2=295308&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir Thu Feb 16 05:25:09 2017
@@ -5,12 +5,14 @@
define void @test_add_s8() { ret void }
define void @test_add_s1() { ret void }
- define void @test_loads() { ret void }
+ define void @test_loads() #0 { ret void }
- define void @test_fadd_s32() { ret void }
- define void @test_fadd_s64() { ret void }
+ define void @test_fadd_s32() #0 { ret void }
+ define void @test_fadd_s64() #0 { ret void }
- define void @test_soft_fp_s64() { ret void }
+ define void @test_soft_fp_s64() #0 { ret void }
+
+ attributes #0 = { "target-features"="+vfp2"}
...
---
name: test_add_s32
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