[llvm] r295028 - [RISCV] Fix RV32 datalayout string and ensure initAsmInfo is called
Alex Bradbury via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 13 21:20:20 PST 2017
Author: asb
Date: Mon Feb 13 23:20:20 2017
New Revision: 295028
URL: http://llvm.org/viewvc/llvm-project?rev=295028&view=rev
Log:
[RISCV] Fix RV32 datalayout string and ensure initAsmInfo is called
Modified:
llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp
Modified: llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp?rev=295028&r1=295027&r2=295028&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp Mon Feb 13 23:20:20 2017
@@ -32,7 +32,7 @@ static std::string computeDataLayout(con
return "e-m:e-i64:64-n32:64-S128";
} else {
assert(TT.isArch32Bit() && "only RV32 and RV64 are currently supported");
- return "e-m:e-i64:64-n32-S128";
+ return "e-m:e-p:32:32-i64:64-n32-S128";
}
}
@@ -51,7 +51,9 @@ RISCVTargetMachine::RISCVTargetMachine(c
CodeGenOpt::Level OL)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM), CM, OL),
- TLOF(make_unique<TargetLoweringObjectFileELF>()) {}
+ TLOF(make_unique<TargetLoweringObjectFileELF>()) {
+ initAsmInfo();
+}
TargetPassConfig *RISCVTargetMachine::createPassConfig(PassManagerBase &PM) {
return new TargetPassConfig(this, PM);
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