[PATCH] D29385: Clzero intrinsic and its addition under znver1

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/X86InstrInfo.td:2461
+  let Uses = [EAX] in
+  def CLZEROr : I<0x01, MRM_FC, (outs), (ins), "clzero", [], IIC_SSE_CLZERO>, TB, Requires<[ HasCLZERO ]>;
+
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Given that clzero writes to memory shouldn't it have a mayStore = 1 attribute? I'm not sure if WriteSystem alone creates the necessary barrier.

This needs testing - check if separate load+instruction and instruction+store don't get folded across the clzero?


Repository:
  rL LLVM

https://reviews.llvm.org/D29385