[PATCH] D29446: [AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat
Geoff Berry via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 6 08:47:44 PST 2017
gberry accepted this revision.
gberry added a comment.
This revision is now accepted and ready to land.
Looks good with a few minor nits.
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Comment at: test/CodeGen/AArch64/ldst-zero.ll:13
+; CHECK: stp xzr, xzr, [x0, #8]
+; CHECK: stp xzr, x2, [x0]
+; CHECK: str w1, [x0, #16]
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These first two checks can be CHECK-DAG since they can be scheduled independently. The same applies to all of these tests I believe.
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Comment at: test/CodeGen/AArch64/misched-stp.ll:10
+; CHECK: test_splat:BB#0 entry
+; CHECK: SU(4): STRWui %vreg3, %vreg2, 3; mem:ST4[%3+8] GPR32:%vreg3 GPR64common:%vreg2
+; CHECK: Successors:
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You might want to make the %vreg matching a little less brittle (i.e. match %vreg{{[0-9]+}} instead of %vreg3 since you aren't really checking anything related to the registers). The same probably goes for the Latency, which can probably just be dropped entirely. And the SU numbers.
Repository:
rL LLVM
https://reviews.llvm.org/D29446
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