[PATCH] D29299: [X86][Tablegen] Fixing register defs and uses for the ENTER instruction.
Chris Ray via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 30 12:44:29 PST 2017
cray created this revision.
Repository:
rL LLVM
https://reviews.llvm.org/D29299
Files:
lib/Target/X86/X86InstrInfo.td
Index: lib/Target/X86/X86InstrInfo.td
===================================================================
--- lib/Target/X86/X86InstrInfo.td
+++ lib/Target/X86/X86InstrInfo.td
@@ -1077,9 +1077,16 @@
// Constructing a stack frame.
-def ENTER : Ii16<0xC8, RawFrmImm8, (outs), (ins i16imm:$len, i8imm:$lvl),
- "enter\t$len, $lvl", [], IIC_ENTER>, Sched<[WriteMicrocoded]>;
+let Defs = [EBP, ESP], Uses = [EBP, ESP], mayLoad = 1, hasSideEffects=0 in
+def ENTER : Ii16<0xC8, RawFrmImm8, (outs), (ins i16imm:$len, i8imm:$lvl),
+ "enter\t$len, $lvl", [], IIC_ENTER>, Sched<[WriteMicrocoded]>,
+ Requires<[Not64BitMode]>;
+let Defs = [RBP, RSP], Uses = [RBP, RSP], mayLoad = 1, hasSideEffects=0 in
+def ENTER64 : Ii16<0xC8, RawFrmImm8, (outs), (ins i16imm:$len, i8imm:$lvl),
+ "enter\t$len, $lvl", [], IIC_ENTER>, Sched<[WriteMicrocoded]>,
+ Requires<[In64BitMode]>;
+
let SchedRW = [WriteALU] in {
let Defs = [EBP, ESP], Uses = [EBP, ESP], mayLoad = 1, hasSideEffects=0 in
def LEAVE : I<0xC9, RawFrm,
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