[PATCH] D29219: [AArch64][TableGen] Skip tied result operands for InstAlias

Renato Golin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 27 05:14:08 PST 2017


rengolin added reviewers: SjoerdMeijer, jmolloy, rovka.
rengolin added a comment.

Hi Graham,

This looks ok to me, but I'm not confident to approve a TableGen back-end patch that could potentially change the behaviour in other targets.

I'm adding other people that touched the code / table files recently, and I'm hoping that other targets developers got the mail via the commits list and will chime in if necessary.

cheers,
--renato



================
Comment at: lib/Target/AArch64/AArch64InstrInfo.td:455
 // First group of aliases covers an implicit "lsl #0".
-def : InstAlias<"movk $dst, $imm", (MOVKWi GPR32:$dst, imm0_65535:$imm, 0)>;
-def : InstAlias<"movk $dst, $imm", (MOVKXi GPR64:$dst, imm0_65535:$imm, 0)>;
+def : InstAlias<"movk $dst, $imm", (MOVKWi GPR32:$dst, imm0_65535:$imm, 0), 0>;
+def : InstAlias<"movk $dst, $imm", (MOVKXi GPR64:$dst, imm0_65535:$imm, 0), 0>;
----------------
If I read `Target.td` correctly, this completely disables the printing in all cases, not just the one you're testing.


================
Comment at: lib/Target/AArch64/AArch64InstrInfo.td:4399
 
-def : InstAlias<"bic.4h $Vd, $imm", (BICv4i16 V64:$Vd,  imm0_255:$imm, 0), 0>;
-def : InstAlias<"bic.8h $Vd, $imm", (BICv8i16 V128:$Vd, imm0_255:$imm, 0), 0>;
-def : InstAlias<"bic.2s $Vd, $imm", (BICv2i32 V64:$Vd,  imm0_255:$imm, 0), 0>;
-def : InstAlias<"bic.4s $Vd, $imm", (BICv4i32 V128:$Vd, imm0_255:$imm, 0), 0>;
+def : InstAlias<"bic.4h $Vd, $imm", (BICv4i16 V64:$Vd,  imm0_255:$imm, 0)>;
+def : InstAlias<"bic.8h $Vd, $imm", (BICv8i16 V128:$Vd, imm0_255:$imm, 0)>;
----------------
I'm not sure why this was disabled, probably due to a similar conflict in the past.

The original patch that introduced this by Tim explains nothing, so I'll assume this is ok.


https://reviews.llvm.org/D29219





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