[llvm] r292551 - [AArch64][GlobalISel] Split legalizer combine tests. NFC.
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 19 16:30:06 PST 2017
Author: ab
Date: Thu Jan 19 18:30:06 2017
New Revision: 292551
URL: http://llvm.org/viewvc/llvm-project?rev=292551&view=rev
Log:
[AArch64][GlobalISel] Split legalizer combine tests. NFC.
Big functions with large vreg # are quite unwieldy to update. This test
also relied on legal s8 operations which we're considering removing.
Change it to have one function per test (it does increase boilerplate,
but makes the core hopefully more readable and maintanable), and use
100% legal operations throughout.
Modified:
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir?rev=292551&r1=292550&r2=292551&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir Thu Jan 19 18:30:06 2017
@@ -3,90 +3,107 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--"
- define void @test_combines() {
- entry:
- ret void
- }
+ define void @test_combines_1() { ret void }
+ define void @test_combines_2() { ret void }
+ define void @test_combines_3() { ret void }
+ define void @test_combines_4() { ret void }
+ define void @test_combines_5() { ret void }
...
---
-name: test_combines
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
- - { id: 3, class: _ }
- - { id: 4, class: _ }
- - { id: 5, class: _ }
- - { id: 6, class: _ }
- - { id: 7, class: _ }
- - { id: 8, class: _ }
- - { id: 9, class: _ }
- - { id: 10, class: _ }
- - { id: 11, class: _ }
- - { id: 12, class: _ }
- - { id: 13, class: _ }
- - { id: 14, class: _ }
- - { id: 15, class: _ }
- - { id: 16, class: _ }
- - { id: 17, class: _ }
- - { id: 18, class: _ }
- - { id: 19, class: _ }
- - { id: 20, class: _ }
- - { id: 21, class: _ }
- - { id: 22, class: _ }
- - { id: 23, class: _ }
- - { id: 24, class: _ }
+name: test_combines_1
body: |
- bb.0.entry:
- liveins: %w0, %w1, %x2, %x3
+ bb.0:
+ liveins: %w0
- %0(s32) = COPY %w0
- %1(s32) = COPY %w1
- %2(s8) = G_TRUNC %0
+ %0:_(s32) = COPY %w0
+ %1:_(s8) = G_TRUNC %0
; Only one of these extracts can be eliminated, the offsets don't match
; properly in the other cases.
- ; CHECK-LABEL: name: test_combines
- ; CHECK: %3(s32) = G_SEQUENCE %2(s8), 1
- ; CHECK: %4(s8) = G_EXTRACT %3(s32), 0
+ ; CHECK-LABEL: name: test_combines_1
+ ; CHECK: %2(s32) = G_SEQUENCE %1(s8), 1
+ ; CHECK: %3(s8) = G_EXTRACT %2(s32), 0
; CHECK-NOT: G_EXTRACT
- ; CHECK: %6(s8) = G_EXTRACT %3(s32), 2
- ; CHECK: %7(s32) = G_ZEXT %2(s8)
- %3(s32) = G_SEQUENCE %2, 1
- %4(s8) = G_EXTRACT %3, 0
- %5(s8) = G_EXTRACT %3, 1
- %6(s8) = G_EXTRACT %3, 2
- %7(s32) = G_ZEXT %5
+ ; CHECK: %5(s8) = G_EXTRACT %2(s32), 2
+ ; CHECK: %6(s32) = G_ZEXT %1(s8)
+
+ %2:_(s32) = G_SEQUENCE %1, 1
+ %3:_(s8) = G_EXTRACT %2, 0
+ %4:_(s8) = G_EXTRACT %2, 1
+ %5:_(s8) = G_EXTRACT %2, 2
+ %6:_(s32) = G_ZEXT %4
+...
+
+---
+name: test_combines_2
+body: |
+ bb.0:
+ liveins: %w0
+
+ %0:_(s32) = COPY %w0
; Similarly, here the types don't match.
- ; CHECK: %10(s32) = G_SEQUENCE %8(s16), 0, %9(s16), 16
- ; CHECK: %11(s1) = G_EXTRACT %10(s32), 0
- ; CHECK: %12(s32) = G_EXTRACT %10(s32), 0
- %8(s16) = G_TRUNC %0
- %9(s16) = G_ADD %8, %8
- %10(s32) = G_SEQUENCE %8, 0, %9, 16
- %11(s1) = G_EXTRACT %10, 0
- %12(s32) = G_EXTRACT %10, 0
+ ; CHECK-LABEL: name: test_combines_2
+ ; CHECK: %2(s64) = G_SEQUENCE %0(s32), 0, %1(s32), 32
+ ; CHECK: %3(s1) = G_EXTRACT %2(s64), 0
+ ; CHECK: %4(s64) = G_EXTRACT %2(s64), 0
+ %1:_(s32) = G_ADD %0, %0
+ %2:_(s64) = G_SEQUENCE %0, 0, %1, 32
+ %3:_(s1) = G_EXTRACT %2, 0
+ %4:_(s64) = G_EXTRACT %2, 0
+...
+
+---
+name: test_combines_3
+body: |
+ bb.0:
+ liveins: %w0
+
+ %0:_(s32) = COPY %w0
+ ; CHECK-LABEL: name: test_combines_3
+ ; CHECK: %1(s32) = G_ADD %0, %0
+ ; CHECK-NOT: G_SEQUENCE
; CHECK-NOT: G_EXTRACT
- ; CHECK: %15(s16) = G_ADD %8, %9
- %13(s16), %14(s16) = G_EXTRACT %10, 0, 16
- %15(s16) = G_ADD %13, %14
-
- ; CHECK: %18(<2 x s32>) = G_EXTRACT %17(s128), 0
- ; CHECK: %19(<2 x s32>) = G_ADD %18, %18
- %16(s64) = COPY %x0
- %17(s128) = G_SEQUENCE %16, 0, %16, 64
- %18(<2 x s32>) = G_EXTRACT %17, 0
- %19(<2 x s32>) = G_ADD %18, %18
+ ; CHECK: %5(s32) = G_ADD %0, %1
+ %1:_(s32) = G_ADD %0, %0
+ %2:_(s64) = G_SEQUENCE %0, 0, %1, 32
+ %3:_(s32), %4:_(s32) = G_EXTRACT %2, 0, 32
+ %5:_(s32) = G_ADD %3, %4
+...
+
+---
+name: test_combines_4
+body: |
+ bb.0:
+ liveins: %x0
+
+ %0:_(s64) = COPY %x0
+
+ ; CHECK-LABEL: name: test_combines_4
+ ; CHECK: %2(<2 x s32>) = G_EXTRACT %1(s128), 0
+ ; CHECK: %3(<2 x s32>) = G_ADD %2, %2
+ %1:_(s128) = G_SEQUENCE %0, 0, %0, 64
+ %2:_(<2 x s32>) = G_EXTRACT %1, 0
+ %3:_(<2 x s32>) = G_ADD %2, %2
+...
+
+---
+name: test_combines_5
+body: |
+ bb.0:
+ liveins: %w0
+
+ %0:_(s32) = COPY %w0
+ ; CHECK-LABEL: name: test_combines_5
; CHECK-NOT: G_SEQUENCE
; CHECK-NOT: G_EXTRACT
- ; CHECK: %24(s32) = G_ADD %0, %20
- %20(s32) = G_ADD %0, %0
- %21(s64) = G_SEQUENCE %0, 0, %20, 32
- %22(s32) = G_EXTRACT %21, 0
- %23(s32) = G_EXTRACT %21, 32
- %24(s32) = G_ADD %22, %23
+ ; CHECK: %5(s32) = G_ADD %0, %1
+ %1:_(s32) = G_ADD %0, %0
+ %2:_(s64) = G_SEQUENCE %0, 0, %1, 32
+ %3:_(s32) = G_EXTRACT %2, 0
+ %4:_(s32) = G_EXTRACT %2, 32
+ %5:_(s32) = G_ADD %3, %4
...
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